I’m supporting a customer in the high-tech and semiconductor domain who is looking for a Senior SoC Architect to lead the design and integration of advanced System-on-Chip (SoC) solutions. This role is ideal for a highly experienced semiconductor professional who can define scalable architectures, drive cross-functional alignment, and deliver cutting-edge, low-power connectivity solutions.
Role Overview
As a Senior SoC Architect, you will be responsible for defining and overseeing the full SoC architecture, from high-level system design through silicon bring-up and validation. You will work closely with hardware, firmware, RF, and system teams to ensure optimal performance, power efficiency, and scalability of next-generation semiconductor products.
Key Responsibilities
• Define and own the high-level SoC architecture, including subsystem partitioning and component selection.
• Collaborate with hardware design teams to guide RTL implementation, physical design, and chip integration.
• Work closely with firmware and software teams to ensure efficient hardware-software co-design, including drivers and low-level optimizations.
• Design and implement robust security architectures to safeguard the SoC.
• Ensure scalability and adaptability of the architecture for future product generations.
• Drive SoC development timelines, deliverables, and alignment with project constraints.
• Lead IP integration efforts, including interconnect architecture (e.g., AMBA, AXI, AHB).
• Define clock, reset, and power architectures, including low-power design strategies (clock/power gating, multi-voltage domains).
• Oversee integration of analog and RF components, ensuring signal integrity and noise resilience.
• Support silicon bring-up, validation, and post-silicon debug activities.
• Stay up to date with semiconductor industry trends and emerging technologies.
Skills & Experience
• Completed university degree in Electrical Engineering, Microelectronics, Embedded Systems, or a related field.
• Minimum 10–12 years of experience in SoC/ASIC development, including RTL design and verification.
• Strong expertise in CPU-based architectures and ARM-based MCU subsystems.
• Deep understanding of memory architectures (SRAM, ROM, Flash) and memory controllers.
• Extensive experience with digital ASIC flows, including DFT, JTAG, scan, and BIST methodologies.
• Solid knowledge of chip packaging and physical integration constraints.
• Proven experience in hardware-software interface design and low-level system optimization.
• Strong understanding of interconnects and IP integration methodologies.
• Experience with communication protocols such as SPI, I2C, UART, MIPI, and LVDS.
• Knowledge of analog/digital interfaces and RF system integration (e.g., PLL, ADC, DAC, LNA).
• Expertise in low-power design techniques and power management architectures.
• Familiarity with pad ring design, ESD strategies, and I/O technology selection.
• Strong problem-solving skills and ability to manage complex system trade-offs.
• Experience with silicon validation and post-silicon debug.
• Background in signal processing and communication systems is a strong advantage.
Logistics
• Location: South Holland (Hybrid)
• Start: ASAP
• Type: Permanent
• Language: English (Dutch is a plus)
If this sounds interesting, send me an email with you CV and number and I’ll be in touch!
ahmad.alqady@vividresourcing.com